1. Field
Aspects of the present disclosure relate generally to receivers, and more particularly, to systems and methods for de-modulating a high-supply-domain differential signal and a common-mode clock in a front-end receiver.
2. Background
A device may include a front-end receiver for receiving an incoming signal from another device. The front-end receiver may perform front-end processing on the received signal before forwarding the signal to other components in the device for further processing. The other components in the device may include core devices (e.g., core transistors) that are not capable of handling the voltage levels of the incoming signal. Therefore, it may be difficult to receive the incoming signal without creating reliability issues at the core devices.
In some applications, the incoming signal may comprise a differential data signal and a common-mode clock signal. An example of such a signal is a multimedia high-definition link (MHL) signal in which a high-speed differential data signal is modulated with a low-frequency common-mode clock signal. In these applications, it may be difficult to separately process the differential data signal and the common-mode clock signal in the incoming signal.